| 1. |
- Sander, Ingo, et al.
(författare)
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High-Level Estimation and Trade-Off Analysis for Adaptive Real-Time Systems
- 2009
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Ingår i: 2009 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL & DISTRIBUTED PROCESSING. - 9781424437511 ; , s. 2985-2988
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Konferensbidrag (refereegranskat)abstract
- We propose a novel design estimation method for adaptive streaming applications to be implemented on a partially reconfigurable FPGA. Based on experimental results we enable accurate design cost estimates at an early design stage. Given the size and computation time of a set of configurations, which can be derived through logic synthesis, our method gives estimates for configuration parameters, such as bitstream sizes, computation mid reconfiguration times. To fulfil the system's throughput requirements, the required FIFO buffer sizes are then calculated using a hybrid analysis approach based on integer linear programming and simulation. Finally, we are able to calculate the total design cost as the sum of the costs for the FPGA area, the required configuration memory and the FIFO buffers. We demonstrate our method by analysing non-obvious trade-offs for a static and dynamic implementation of adaptivity.
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| 2. |
- Zhu, Jun, et al.
(författare)
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Buffer Minimization of Real-Time Streaming Applications Scheduling on Hybrid CPU/FPGA Architectures
- 2009
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Ingår i: DATE. - 9781424437818 ; , s. 1506-1511
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Konferensbidrag (refereegranskat)abstract
- We address the problem of real-time streaming applications scheduling on hybrid CPU/FPGA architectures. The main contribution is a two-step approach to minimize the buffer requirement for streaming applications with throughput guarantees. A novel declarative way of constraint based scheduling for real-time hybrid SW/HW systems is proposed, while the application throughput is guaranteed by periodic phases in execution. We use a voice-band modem application to exemplify the scheduling capabilities of our method. The experimental results show the advantages of our techniques in both less buffer requirement and higher throughput guarantees compared to the traditional PAPS method.
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| 3. |
- Zhu, Jun, et al.
(författare)
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Constrained Global Scheduling of Streaming Applications on MPSoCs
- 2010
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Ingår i: 2010 15TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC 2010). - 9781424457656 ; , s. 223-228
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Konferensbidrag (refereegranskat)abstract
- We present a global scheduling framework for synchronous data flow (SDF) streaming applications on MPSoCs, based on optimized computation and contention-free routing. The global scheduling of processors computing and communication transactions are formulated as constraint based problem, to avoid the scheduling overhead in TDMA-like heuristic schemes. A public domain constraint solver is exploited to solve the NP-complete scheduling efficiently, together with problem specific constraint modeling techniques. Experimental results show that the proposed framework can achieve a high predictable application throughput with minimized buffer cost. For instance, for applications in communication domain, higher throughput (up to 87%) has been observed with less buffer cost, compared to scenarios considering the heuristic scheduling overhead.
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| 4. |
- Zhu, Jun, 1976-
(författare)
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Energy and Design Cost Efficiency for Streaming Applications on Systems-on-Chip
- 2009
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Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
- With the increasing capacity of today's integrated circuits, a number ofheterogeneous system-on-chip (SoC) architectures in embedded systemshave been proposed. In order to achieve energy and design cost efficientstreaming applications on these systems, new design space explorationframeworks and performance analysis approaches are required. Thisthesis considers three state-of-the-art SoCs architectures, i.e., themulti-processor SoCs (MPSoCs) with network-on-chip (NoC) communication,the hybrid CPU/FPGA architectures, and the run-time reconfigurable (RTR)FPGAs. The main topic of the author?s research is to model and capturethe application scheduling, architecture customization, and bufferdimensioning problems, according to the real-time requirement. Sincethese problems are NP-complete, heuristic algorithms and constraintprogramming solver are used to compute a solution.For NoC communication based MPSoCs, an approach to optimize thereal-time streaming applications with customized processorvoltage-frequency levels and memory sizes is presented. A multi-clockedsynchronous model of computation (MoC) framework is proposed inheterogeneous timing analysis and energy estimation. Using heuristicsearching (i.e., greedy and taboo search), the experiments show anenergy reduction (up to 21%) without any loss in application throughputcompared with an ad-hoc approach.On hybrid CPU/FPGA architectures, the buffer minimization scheduling ofreal-time streaming applications is addressed. Based on event models,the problem has been formalized decoratively as constraint basescheduling, and solved by public domain constraint solver Gecode.Compared with traditional PAPS method, the proposed method needssignificantly smaller buffers (2.4% of PAPS in the best case), whilehigh throughput guarantees can still be achieved.Furthermore, a novel compile-time analysis approach based on iterativetiming phases is proposed for run-time reconfigurations in adaptivereal-time streaming applications on RTR FPGAs. Finally, thereconfigurations analysis and design trade-offs analysis capabilities ofthe proposed framework have been exemplified with experiments on bothexample and industrial applications.
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| 5. |
- Zhu, Jun, et al.
(författare)
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Energy efficient streaming applications with guaranteed throughput on MPSoCs
- 2008
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Ingår i: Proceedings of the 7th ACM International Conference on Embedded Software, EMSOFT 2008. - New York, NY, USA : ACM. - 9781605584683 ; , s. 119-128
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Konferensbidrag (refereegranskat)abstract
- In this paper we present a design space exploration flow to achieve energy efficiency for streaming applications on MPSoCs while meeting the specified throughput constraints. The public domain simulators Sim-Panalyzer and Cacti are used to estimate the energy dissipations of the parameterized architectural components. As the main contributions, we schedule the streaming applications on a multi-clock synchronous modeling framework, guarantee the application timing properties by throughput analysis, and customize both processor voltage-frequency levels and memory sizes in the design space to optimize the application pipeline parallelism for energy efficiency. Two widely used heuristic algorithms (i.e., greedy and taboo search) are used during the design optimization process. Our experiments show an energy reduction of 21% without any loss in application throughput compared with an ad-hoc approach.
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| 6. |
- Zhu, Jun, et al.
(författare)
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HetMoC : Heterogeneous Modeling in SystemC
- 2010
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Ingår i: Proceedings of the Forum on Design Langauges (FDL). - : IET. - 9782953050431 ; , s. 117-122
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Konferensbidrag (refereegranskat)abstract
- We propose a novel heterogeneous model-of-computation (HetMoC) framework in SystemC for embedded computing systems. As the main contribution, we formally define the computation and communication in multiple domains (continuous-time, discrete-event, synchronous/reactive, and untimed) as polymorphic processes and signals, and present domain interfaces to integrate different domains together for heterogeneous process networks. Especially, the continuous-time signals are defined with time continuum, which are distinguished from existing approaches. For implementation, a functional modeling style has been adopted to construct HetMoC. A solver with error estimation has been exploited in numerical approximation, and the time-varying functionalities in adaptive systems have been captured in HetMoC as well. In experiments, based on an adaptive transceiver system case study, HetMoC shows promising capabilities compared with a reference model in SystemC-AMS.
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| 7. |
- Zhu, Jun, et al.
(författare)
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Pareto Efficient Design for Reconfigurable Streaming Applications on CPU/FPGAs
- 2010
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Ingår i: Proceedings of Design Automation and Test in Europe (DATE ’10). - 9783981080162 ; , s. 1035-1040
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Konferensbidrag (refereegranskat)abstract
- We present a Pareto efficient design method for multi-dimensional optimization of run-time reconfigurable streaming applications on CPU/FPGA platforms, which automatically allocates applications with optimized buffer requirement and software/hardware implementation cost. At the same time, application performance is guaranteed with sustainable throughput during run-time reconfigurations. As the main contribution, we formulate the constraint based application allocation, scheduling, and reconfiguration analysis, and propose a design Pareto-point calculation flow. A public domain solver - Gecode is used in solutions finding. The capability of our method has been exemplified by two cases studies on applications from media and communication domains.
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| 8. |
- Zhu, Jun, 1976-
(författare)
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Performance Analysis and Implementationof Predictable Streaming Applications onMultiprocessor Systems-on-Chip
- 2010
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Driven by the increasing capacity of integrated circuits, multiprocessorsystems-on-chip (MPSoCs) are widely used in modern consumer electron-ics devices. In this thesis, the performance analysis and implementationmethodologies are explored to design predictable streaming applications onMPSoCs computing platforms. The application functionality and concur-rency are described in synchronous data flow (SDF) computational models,and two state-of-the-art architecture templates are adopted as multiproces-sor architectures, i.e., network-on-chip (NoC) based MPSoC and hybrid re-configurable CPU/FPGA platforms. Based on the author’s contributions onsimulation and formal analytical methods, performance analysis and designspace exploration for embedded MPSoCs architectures have been addressed. An energy efficient design space exploration flow is proposed for stream-ing applications with guaranteed throughput on NoC based MPSoCs, in whichboth application throughput analysis and system energy calculation are car-ried out by simulation on a multi-clocked synchronous modelling frame-work. On the other hand, based on event models of data streams, a formalanalytical scheduling framework for real-time streaming applications withminimal buffer requirement on hybrid CPU/FPGA architectures is exploited.The scheduling problem has been formalized declaratively by constraint basetechniques, and solved by a public domain constraint solver. Consecutively,the constraint based method has been extended to solve problems rangingfrom global computation/communication scheduling and reconfiguration anal-ysis to Pareto efficient design. Finally, a prototype of stream processing sys-tem on FPGA based MPSoC is built to substantiate the results from theoreti-cal studies in this thesis.
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| 9. |
- Zhu, Jun, et al.
(författare)
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Performance Analysis of Reconfiguration in Adaptive Real-Time Streaming Applications
- 2008
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Ingår i: PROCEEDINGS OF THE 2008 IEEE/ACM/IFIP WORKSHOP ON EMBEDDED SYSTEMS FOR REAL-TIME MULTIMEDIA. - 9781424426126 ; , s. 53-58
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Konferensbidrag (refereegranskat)abstract
- We propose a design optimization framework for adaptive real-time streaming applications. The main contribution is a hybrid approach for performance analysis combining formal analysis and simulation using a two-phase framework. We formulate the scheduling problem of adaptive streaming applications with ILP analysis, and use the simulation based on the synchronous model of computation to ensure throughput guarantees. We finally illustrate the capabilities of our methodology by experiments.
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| 10. |
- Zhu, Jun, et al.
(författare)
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Performance Analysis of Reconfigurations in Adaptive Real-Time Streaming Applications
- 2012
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Ingår i: ACM Transactions on Embedded Computing Systems. - : Association for Computing Machinery (ACM). - 1539-9087 .- 1558-3465. ; 11:1
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Tidskriftsartikel (refereegranskat)abstract
- We propose a performance analysis framework for adaptive real-time synchronous data flow streaming applications on runtime reconfigurable FPGAs. As the main contribution, we present a constraint based approach to capture both streaming application execution semantics and the varying design concerns during reconfigurations. With our event models constructed as cumulative functions on data streams, we exploit a novel compile-time analysis framework based on iterative timing phases. Finally, we implement our framework on a public domain constraint solver, and illustrate its capabilities in the analysis of design trade-offs due to reconfigurations with experiments.
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